1. Field of the Invention
The present invention relates to a reference voltage producing circuit in which a reference voltage is produced so as to reduce electric power consumed during a standby time period of transistors.
2. Description of Related Art
A large number of transistors manufactured according to prescribed functional specifications are arranged in a semiconductor integrated circuit. However, because conditions of the manufacturing process of transistors are undesirably changed, a threshold value Vth of voltage relating to both the on state and the off state or a channel length in each transistor is not accurately set to a designed value. Therefore, there is a case where transistors manufactured according to the same functional specification have different threshold values Vth of voltage and channel lengths.
For example, the threshold value Vth of voltage in a transistor actually manufactured is lower than a designed value, or the channel length in a transistor actually manufactured is shorter than a designed value. In this case, leak current of the transistor in a standby time period is undesirably heightened. Therefore, electric power consumed in a semiconductor integrated circuit having transistors in a standby time period is undesirably heightened more than a designed consumed electric power, a backup time of the semiconductor integrated circuit determined by a battery is shortened, and data stored in the transistors of the semiconductor integrated circuit is undesirably lost. To prevent this problem, transistors manufactured so as to have high leak current in a standby time period are normally discarded as defective transistors.
Here, a power management device is disclosed in Published Unexamined Japanese Patent Application No. H11-3132 (1999) as a conventional reference voltage producing circuit. In this device, voltage of a power source is controlled according to an operating frequency. However, in this device, leak current of no transistor in a standby time period is reduced while considering a difference between characteristics of the actually manufactured transistor and designed characteristics.
As is described above, the conventional reference voltage producing circuit is manufactured not to reduce leak current in a standby time period. Therefore, when the operating frequency of the conventional reference voltage producing circuit is lowered, voltage of the power source is lowered, and the conventional reference voltage producing circuit is operated while lowering the consumed electric power. However, in cases where transistors manufactured so as to have high leak current in a standby time period are arranged in a semiconductor integrated circuit, there is a problem that electric power consumed in the semiconductor integrated circuit cannot be reduced by using the conventional reference voltage producing circuit.
An object of the present invention is to provide, with due consideration to the drawbacks of the conventional reference voltage producing circuit, a reference voltage producing circuit which appropriately reduces electric power consumed in transistors of a semiconductor integrated circuit in a standby time period of the transistors even though the transistors are manufactured so as to have high leak current in a standby time period.
The object is achieved by the provision of a reference voltage producing circuit including reference voltage producing means, current supplying means and voltage control means. A reference voltage is produced by the reference voltage producing means according to leak current of a leak monitoring transistor in a standby time period, and an output voltage corresponding to the reference voltage by the voltage control means is applied to a semiconductor integrated circuit by the current supplying means.
Therefore, the output voltage applied to the semiconductor integrated circuit can be adjusted according to the leak current of the leak monitoring transistor in a standby time period. Accordingly, even though transistors are manufactured so as to have high leak current in a standby time period, electric power consumed in the semiconductor integrated circuit having the transistors can be appropriately reduced in a standby time period of the semiconductor integrated circuit.